16601A - Agilent HP Logic Analyzers
- Number of Channels 136 ch
- Maximum Conventional Timing Rate 125 MHz
- Maximum Conventiona Timing Rate(half ch) 250 MHz
- Memory Depth/Channel-Normal 64 KB
- Memory/Channel Half-Channel Mode 128 KB
- Channel to Channel Delay 2 ns
- Setup/Hold Time 4.5 ns
- Maximum Trigger Sequence Levels 12 Levels
- Maximum Trigger Sequencing Rate 100 MHz
- 1 slot
- Multi-window interface
- Setup Assistant
- Max State Clock 100 MHz
- On-chip emulation link-debugge
- Multiple time-correlated views
Specifications Max. State Speed 100.0 MHz Memory Depth 64 KB; 128 KB/half ch
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